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Extending the road beyond CMOS

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4 Author(s)
J. A. Hutchby ; Semicond. Res. Corp., Durham, NC, USA ; G. I. Bourianoff ; V. V. Zhirnov ; J. E. Brewer

The accelerating pace of CMOS scaling is rapidly approaching the fundamental limits of MOSFET performance, even as the projected size of a high-performance and manufacturable MOSFET technology is currently being extended with growing confidence to the 22-nm node (featuring a 9-nm physical gate length). The new 2001 International Technology Roadmap for Semiconductors currently projects the industry to reach this node in 2016. However, this forecast assumes the traditional industry node-cycle cadence of a quadrupling of the number of transistors every three years for DRAMS and a return to the three-year cycle in 2004 for MPUs and ASICs. During the past several years the node cycles for MPUs have been accelerated to occur within two-year periods. This pace will bring the microelectronics industry to the end of silicon CMOS technology scaling sometime not later than 2016, and maybe as soon as 2010. The new Emerging Technologies section of the 2001 ITRS offers guidance on both sides of this problem: nanoelectronics for memory, logic, and information-processing architectures could possibly extend the time frame of the ITRS beyond CMOS

Published in:

IEEE Circuits and Devices Magazine  (Volume:18 ,  Issue: 2 )