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A method for storing fail bit maps in burn-in memory testers

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2 Author(s)
Iseno, A. ; Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan ; Iguchi, Y.

Although fail bit maps in burn-in memory testers are important for analyzing process problems, we need very large storage for storing them. This paper presented a method for compressing fail bit maps and storing them in cache RAMs. We classify fail patterns under six types. Cache RAM stores the fail types and their locations. Since the proposed method is simple, it can be easily implemented in hardware on every DUT (device under test) board. A prototype has been developed by using an FPGA and an SRAM

Published in:

Electronic Design, Test and Applications, 2002. Proceedings. The First IEEE International Workshop on

Date of Conference:

2002