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An advanced compiler framework for non-cache-coherent multiprocessors

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5 Author(s)
Yunheung Paek ; Dept. of Electr. Eng. & Comput. Sci., Korean Adv. Inst. of Sci. & Technol., Taejon, South Korea ; Navarro, A. ; Zapata, E. ; Hoeflinger, J.
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The Cray T3D and T3E are non-cache-coherent (NCC) computers with a NUMA structure. They have been shown to exhibit a very stable and scalable performance for a variety of application programs. Considerable evidence suggests that they are more stable and scalable than many other shared-memory multiprocessors. However, the principal drawback of these machines is a lack of programmability, caused by the absence of the global cache coherence that is necessary to provide a convenient shared view of memory in hardware. This forces the programmer to keep careful track of where each piece of data is stored, a complication that is unnecessary when a pure shared-memory view is presented to the user. We believe that a remedy for this problem is advanced compiler technology. In this paper, we present our experience with a compiler framework for automatic parallelization and communication generation that has the potential to reduce the time-consuming hand-tuning that would otherwise be necessary to achieve good performance with this type of machine. From our experiments, we learned that our compiler performs well for a variety of applications on the T3D and T3E and we found a few sophisticated techniques that could improve performance even more once they are fully implemented in the compiler

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Parallel and Distributed Systems, IEEE Transactions on  (Volume:13 ,  Issue: 3 )