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Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage

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7 Author(s)
J. Tschanz ; Microprocessor Res. Labs, Intel Corp., Hillsboro, OR, USA ; J. Kao ; S. Narendra ; R. Nair
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Measurements on a 150 nm CMOS test chip show that on-chip bidirectional adaptive body biasing compensates effectively for die-to-die parameter variation to meet both frequency and leakage requirements. An enhancement of this technique to correct for within-die variations triples the accepted die count in the highest frequency bin.

Published in:

Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International  (Volume:1 )

Date of Conference:

7-7 Feb. 2002