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A 125 mm/sup 2/ 1Gb NAND flash uses 0.13 /spl mu/m CMOS. The cell is 0.077 /spl mu/m/sup 2/. Chip architecture is changed to reduce chip size and to realize 10.6 MB/s throughput for program and 20 MB/s for read. An on-chip page copy function provides 9.4 MB/s throughput for garbage collection.