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A 1.0 V V/sub DD/ CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 /spl mu/m CMOS process

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3 Author(s)
Chen Xu ; Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China ; Weiquan Zhang ; Mansun Chan

A 128/spl times/128 complementary CMOS active-pixel sensor (CAPS) is fabricated in 0.25 /spl mu/m CMOS for low-voltage application. A single-slope with correlated double sampling (CDS) is used in the readout circuit. The chip operates at a V/sub DD/ as low as 0.8 V with 15 dB added dynamic range compared with conventional CMOS APS.

Published in:

Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International  (Volume:1 )

Date of Conference:

7-7 Feb. 2002