Referenced Items are not available for this document.
The authors present an accurate analytical method for analyzing the power consumption in CMOS buffers. It is derived from the charge transferred through the circuit and makes use of the physically based MM9 MOSFET model (Velghe et al., 1994), (Foty et al., 1997) as well as a modified Sakurai alpha-power law model. The resulting analytical model accounts for the effects of input slew time, device sizes, carrier velocity saturation effects, input-to-output coupling capacitance, output load, and temperature. Results are compared to HSPICE simulations (level 50) and to other models previously published considering a large set of parameters for a 0.18 and 0.35 μm technologies, showing significant improvements
Published in:
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
(Volume:21
,
Issue:
4
)
Date of Publication: Apr 2002
- Page(s):
- 433 - 448
- ISSN :
- 0278-0070
- INSPEC Accession Number:
- 7232702
- Digital Object Identifier :
- 10.1109/43.992767
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 07 August 2002
- Issue Date :
- Apr 2002
- Sponsored by :
- IEEE Council on Electronic Design Automation
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