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An 18-mW 2.5-GHz/900-MHz BiCMOS dual frequency synthesizer with <10-Hz RF carrier resolution

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3 Author(s)
Woogeun Rhee ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Bisanti, B. ; Ali, A.

A 2.5-GHz/900-MHz dual fractional-N/integer-N frequency synthesizer is implemented in 0.35-μm 25-GHz BiCMOS. A ΔΣ fractional-N synthesizer is employed for RF channels to have agile switching, low in-band noise, and fine frequency resolution. Implementing two synthesizers with an on-chip ΔΣ modulator in a small package is challenging since the modulator induces substantial digital noise. In this work, several design aspects regarding noise coupling are considered. The fractional-N synthesizer offers less than 10-Hz frequency resolution having the in-band noise contribution of -88 dBc/Hz for 2.47-GHz output frequency and -98 dBc/Hz for 1.15-GHz output frequency, both measured at 20-kHz offset frequency. The prototype dual synthesizer consumes 18 mW with 2.6-V supply

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:37 ,  Issue: 4 )