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On improving a fault simulation based test generator for synchronous sequential circuits

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3 Author(s)
Ruifeng Guo ; RA1-329, Intel Corp., Hillsboro, OR, USA ; Reddy, S.M. ; Pomeranz, I.

We propose several techniques to improve a simulation based test pattern generation procedure for sequential circuits. The effectiveness of the proposed techniques is demonstrated through experimental results on a large set of benchmark circuits

Published in:
Test Symposium, 2001. Proceedings. 10th Asian

Date of Conference: 2001

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