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Quasi-complementary BiCMOS for sub-3-V digital circuits

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9 Author(s)
Yano, K. ; Center for Solid State Electron. Res., Arizona State Univ., Tempe, AZ, USA ; Hiraki, M. ; Shukuri, S. ; Onose, Y.
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The authors describe a quasi-complementary BiCMOS (QC-BiCMOS) circuit scheme for the low-supply-voltage deep-submicrometer regime. A QC-BiCMOS performs twice as fast as a CMOS even at a 2.5-V supply without a p-n-p bipolar transistor. Key circuits for this low-voltage performance are a separation between the base of the pull-up bipolar and the base of a quasi-p-n-p and the carefully designed base discharging circuit. A quasi-p-n-p combination of a pMOS and an n-p-n bipolar based on these circuits shows an equivalent cutoff frequency of over 10 GHz. The delay expressions for the QC-BiCMOS are analyzed and compared with the conventional BiCMOS. A 0.3-μm fully loaded three-input NAND gate was fabricated, verifying that the QC-BiCMOS has more than twice the performance leverage over the conventional BiCMOS and the CMOS at a sub-3-V supply

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Solid-State Circuits, IEEE Journal of  (Volume:26 ,  Issue: 11 )