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A single chip MOS decoder IC for a video program identification system

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3 Author(s)
Kreuzpointner, G. ; Siemens AG, Munich, West Germany ; Meindl, X. ; Tauber, R.

A single-chip NMOS data line decoder for the European Video Programming System (VPS) is described. Video cassette recorders with a built-in VPS receiver can record a TV program under the control of a TV transmitter broadcasting an identification code along with the actual program. The code is transmitted in TV line 16 (the European Broadcasting Union data line) during the vertical blanking interval. Biphase (Manchester II) code is used for coding the bit information. The chip contains all the analog and digital circuitry necessary to retrieve the biphase coded data directly from the composite video signal and to preprocess them from a microcontroller. A description is given of the circuit's ability to perform data slicing and timing recovery of the coded data. The 8-mm2 chip VPS decoder is fabricated using a 2.5-μm n-channel MOS process and is capable of processing signals with a sync pulse peak-to-peak amplitude of 300 mV±6 dB and a data amplitude of 500 mV±6 dB. It needs only a single 5-V power supply and consumes typically 150 mW at room temperature, including approximately 5 mW for the analog parts

Published in:

Consumer Electronics, IEEE Transactions on  (Volume:34 ,  Issue: 4 )

Date of Publication:

Nov 1988

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