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Supply noise insensitive PLL design through PWL behavioral modeling and simulation

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3 Author(s)
Chang-Hyeon Lee ; Wireless Commun. Div., Conexant Syst. Inc, Newport Beach, CA, USA ; McClellan, K. ; Choma, J.

This brief presents a design flow for a supply noise insensitive (SNI) phase-locked loop (PLL). The influence on the PLL jitter of each noise component having high/low bandpass filter characteristics is investigated in the time domain. Acquisition time, tracking range, lock range and jitter are key parameters of a PLL system, and they are evaluated with piecewise linear (PWL) behavioral modeling. Finally, the SNI-PLL circuit having worst-case -45-dB power supply noise rejection based on the behavioral simulation results is implemented

Published in:

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:48 ,  Issue: 12 )

Date of Publication:

Dec 2001

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