By Topic

Protocol wrappers for layered network packet processing in reconfigurable hardware

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
F. Braun ; Stuttgart Univ., Germany ; J. Lockwood ; M. Waldvogel

A library of layered protocol wrappers processes Internet packets in reconfigurable hardware. Collectively, the wrappers simplify and streamline the implementation of high-level networking functions by abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform called the field-programmable port extender (FPX). The library processes asynchronous transfer mode (ATM) cells, ATM adaptation layer 5 (AAL5) frames, Internet protocol (IP) messages, and user datagrarn protocol (UDP) packets directly in hardware. Applications can process data at several layers of the protocol stack using the library of wrappers discussed in this article. Layers are important for networks because they let applications abstract from above and below details of the network protocols. At the lowest layer, networks modify raw data passing between interfaces. At higher levels, the applications process variable length frames or IP packets.A network platform called the field-programmable port extender (FPX) streamlines and simplifies network transmission processing directly in hardware

Published in:

IEEE Micro  (Volume:22 ,  Issue: 1 )