By Topic

Low-noise silicon avalanche photodiodes fabricated in conventional CMOS technologies

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Rochas, A. ; Inst. of Microsystems, Swiss Fed. Inst. of Technol., Lausanne, Switzerland ; Pauchard, A.R. ; Besse, Pierre-A. ; Pantic, D.
more authors

We present a simple design technique that allows the fabrication of UV/blue-selective avalanche photodiodes in a conventional CMOS process. The photodiodes are fabricated in a twin tub 0.8 μm CMOS technology. An efficient guard-ring structure is created using the lateral diffusion of two n-well regions separated by a gap of 0.6 μm. When operated at a multiplication gain of 20, our photodiodes achieve a very low dark current of only 400 pA/mm2, an excess noise factor F=7 at λ=400 nm and a good gain uniformity. At zero bias voltage, the responsivity peaks at λ=470 nm, with 180 mA/W. It corresponds to a 50% quantum efficiency. Successive process steps are simulated to provide a comprehensive understanding of this technique

Published in:

Electron Devices, IEEE Transactions on  (Volume:49 ,  Issue: 3 )