By Topic

Design and implementation of a high speed vector processor for real-time SAR imaging

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Wang Jun ; Dept. of Electron. Eng., Beijing Univ. of Aeronaut. & Astronaut., China ; Mao Shiyi ; Wang Yuezhong

The VP (vector processor), designed and accomplished by ourselves, is an advanced processor, with BDSP9124/9320 as its main component. It can process 1M samples of data, and processing precision approaches the floating point processor. It could be applied for SAR (synthetic aperture radar) and other fields. The CSA (chirp scaling algorithm) is suitable for the VP calculation. Using the two-dimensional FFT to perform the CSA, the VP can remove corner turning memory and reduce processing overhead. Using the a large radix to complete the FFT, it can also reduce the processing time. The VP can produce a satisfactory image with high resolution, in right and squint side looking strip mapping

Published in:

Radar, 2001 CIE International Conference on, Proceedings

Date of Conference:

2001