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A new RSA cryptosystem hardware implementation based on high-radix Montgomery's algorithm

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2 Author(s)
Fang Yingli ; Inst. of Microelectron., Tsinghua Univ., Beijing, China ; Gao Zhiqiang

In this paper, we propose an efficient hardware-oriented modular multiplication algorithm based on Montgomery's algorithm. We employ the high-radix technique and modify the original Montgomery's algorithm to reduce hardware complexity and improve processing speed. A RSA cryptosystem hardware design based on this proposed algorithm is presented. The design has been implemented to a single-chip 512-bit RSA processor with CSMC (Central Semiconductor Manufacture Corporation) 0.6um CMOS standard cell library. The processor contains about 96k gates and delivers a baud rate of 113kbits/sec with 40MHz clock in the worst case

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ASIC, 2001. Proceedings. 4th International Conference on

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