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Folding pipeline architecture based on the least-energy algorithm for high level synthesis

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4 Author(s)
Zhang Sheng ; Inst. of Microelectron., Tsinghua Univ., Beijing, China ; Zhu Ning ; Zhou Runde ; Ge Yuanqing

Pipeline architecture is very important in high level design and synthesis of digital circuits, especially for datapath design. The paper focuses on the folding pipeline architecture, presenting a new transform method for resources allocation with timing constraints. A least-energy folding and cycling schedule algorithm is proposed for synthesis, and a pipelined architecture based on a butterfly net is realized, which has benefits for interconnection design in deep-submicron technology

Published in:

ASIC, 2001. Proceedings. 4th International Conference on

Date of Conference:

2001

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