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Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel

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7 Author(s)
Yee-Chia Yeo ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Subramanian, Vivek ; Kedzierski, J. ; Peiqi Xuan
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Thin-body p-channel MOS transistors with a SiGe/Si heterostructure channel were fabricated on silicon-on-insulator (SOI) substrates. A novel lateral solid-phase epitaxy process was employed to form the thin-body for the suppression of short-channel effects. A selective silicon implant that breaks up the interfacial oxide was shown to facilitate unilateral crystallization to form a single crystalline channel. Negligible threshold voltage roll-off was observed down to a gate length of 50 nm. The incorporation of Si0.7Ge0.3 in the channel resulted in a 70% enhancement in the drive current. This is the smallest SiGe heterostructure-channel MOS transistor reported to date. This is also the first demonstration of a thin-body MOS transistor incorporating a SiGe heterostructure channel

Published in:

Electron Devices, IEEE Transactions on  (Volume:49 ,  Issue: 2 )

Date of Publication:

Feb 2002

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