Scheduled System Maintenance:
On Monday, April 27th, IEEE Xplore will undergo scheduled maintenance from 1:00 PM - 3:00 PM ET (17:00 - 19:00 UTC). No interruption in service is anticipated.
By Topic

Original cabling conditions to insure balanced current during switching transitions between paralleled semiconductors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Jeannin, P. ; Lab. d''Electrotechnique de Grenoble, CNRS, Grenoble, France ; Schanen, J.-L. ; Clavel, E.

This paper deals with the problem of paralleling components. First, general investigations concerning the influence of stray inductances on the current and voltage differences between n-paralleled components are presented. Original cabling conditions are deduced to insure balanced electrical constraints. Then, a power module involving two paralleled MOSFETs is analyzed. To validate the original presented conditions, two different choppers, involving paralleled power modules have been built, with different layouts. Experimental and simulated results confirm the validity of the proposed rules

Published in:

Industry Applications, IEEE Transactions on  (Volume:38 ,  Issue: 1 )