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High-performance symmetric-gate and CMOS-compatible V/sub t/ asymmetric-gate FinFET devices

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24 Author(s)
Kedzierski, J. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA ; Fried, D.M. ; Nowak, E.J. ; Kanarsky, T.
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Double-gate FinFET devices with asymmetric and symmetric polysilicon gates have been fabricated. Symmetric gate devices show drain currents competitive with fully optimized bulk silicon technologies. Asymmetric-gate devices show |V/sub t/|/spl sim/0.1 V, with off-currents less than 100 nA/um at V/sub gs/=0.

Published in:

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Date of Conference:

2-5 Dec. 2001