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The author presents an algorithm which combines the pin assignment step and the global routing step in the physical design of VLSI circuits. The algorithm is based on two key theorems: the channel pin assignment theorem and the block boundary decomposition theorem. These two theorems deal successfully with the high complexity resulting from combining the pin assignment and global routing steps. According to these two theorems, one only needs to generate a coarse pin assignment and global routing solution. The exact pin locations and global routing topology can be determined optimally later by a linear time algorithm. The author implemented a pin assignment and global routine package named BeauticianGR based on the proposed algorithm. This package produces satisfactory results on test circuits
Published in:
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
(Volume:10
,
Issue:
11
)
Date of Publication: Nov 1991
- Page(s):
- 1401 - 1412
- ISSN :
- 0278-0070
- INSPEC Accession Number:
- 4078015
- Digital Object Identifier :
- 10.1109/43.97619
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Nov 1991
- Sponsored by :
- IEEE Council on Electronic Design Automation
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