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Prototyping of a Java-embedded multimedia processor

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3 Author(s)
Fukase, M. ; Dept. of Electron. & Inf. Syst. Eng., Hirosaki Univ., Japan ; Khondkar, P. ; Nakamura, T.

Still further improvement of multimedia processors is strongly expected to exploit more profitable features because they are essential for the ever-growing Internet. Those processors embedded with a user-friendly programming language Java as a common base are sophisticated mixed systems merging hardware and software. In order to reduce cost and effort in their designing, Field Programmable Gate Array (FPGA) prototyping is really an attractive approach. We describe here the prototyping of a 32-bit Java embedded multimedia processor (MmP) by a 20k-gate FPGA. The main scope with respect to our FPGA prototyping is the compatibility of space and clock speed. The switching speed of the FPGA is not so high grade due to its inevitable tradeoffs against gate count, which we cannot but keep in some degree to cover inherent Java features. Nevertheless, MmP works at the rate of more than 25 MHz owing to our totally minute adjustment through the developing process from hardware description to chip implementation. MmP with an enough instruction set is significantly faster than other Java-embedded processors by similar speed grade FPGAs. Our approach described here naturally abstracts maximum benefit even in case of other type ASIC and custom designs

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Industrial Electronics Society, 2001. IECON '01. The 27th Annual Conference of the IEEE  (Volume:3 )

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