Referenced Items are not available for this document.
A T-gate structure has been implemented in the fabrication of fully depleted silicon-on-insulator MOSFETs. The T-gate process is fully compatible with the standard CMOS and the resulting reduction of gate-resistance significantly improved the RF performance. Measured f/sub max/ is 76 GHz and 63 GHz for n- and p-MOSFET with 0.2-/spl mu/m gate length, respectively. At 2 GHz, a minimum noise figure of 0.4 dB was measured on an n-MOSFET with the T-gate structure.
Published in:
Electron Device Letters, IEEE
(Volume:23
,
Issue:
1
)
Date of Publication: Jan. 2002
- Page(s):
- 52 - 54
- ISSN :
- 0741-3106
- INSPEC Accession Number:
- 7157682
- Digital Object Identifier :
- 10.1109/55.974810
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 07 August 2002
- Issue Date :
- Jan. 2002
- Sponsored by :
- IEEE Electron Devices Society
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