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A linear MOS transconductor using source degeneration and adaptive biasing

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2 Author(s)
Ko-Chi Kuo ; Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA ; A. Leuciuc

This paper presents a new configuration for linear MOS voltage-to-current conversion (transconductance). The proposed circuit combines two previously reported linearization methods. The topology achieves 60-dB linearity for a fully balanced input dynamic range up to 1 Vpp at a 3.3-V supply voltage, with slightly decreasing performance in the unbalanced case. The linearity is preserved during the tuning process for a moderate range of transconductance values. The approach is validated by both computer simulations and experiments

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IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing  (Volume:48 ,  Issue: 10 )