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Arsenic/phosphorus LDD optimization by taking advantage of phosphorus transient enhanced diffusion for high voltage input/output CMOS devices

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6 Author(s)
Howard Chih-Hao Wang ; Device Technol. & Modeling Dept., Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan ; Chih-Chiang Wang ; Diaz, C.H. ; Boon-Khim Liew
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Optimization of a LDD doping profile to enhance hot carrier resistance in 3.3 V input/output CMOS devices has been performed by utilizing phosphorus transient enhanced diffusion (TED). Hot carrier effects in hybrid arsenic/phosphorus LDD nMOSFET's with and without TED are characterized comprehensively. Our result shows that the substrate current in a nMOSFET with phosphorus TED can be substantially reduced, as compared to the one without TED. The reason is that the TED effect can yield a more graded n- LDD doping profile and thus a smaller lateral electric field. Further improvement of hot carrier reliability can be achieved by optimizing arsenic implant energy. Secondary ion mass spectrometry analysis for TED effect and two-dimensional (2-D) device simulation for electric field and current flow distributions have been conducted. The phosphorus TED effects on transistor driving current and off-state leakage current are also investigated

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Electron Devices, IEEE Transactions on  (Volume:49 ,  Issue: 1 )