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A novel technique for efficient parallel implementation of a classical logic/fault simulation problem

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1 Author(s)
Bose, P. ; IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

A technique is presented for formulating the logic/fault simulation of VLSI array logic in terms of standard vector and matrix operation primitives that are well supported on all scientific supercomputers, high-end mainframes, and minisupercomputers that provide vector parallel hardware and software. The overall computing environment is assumed to be a scientific/engineering one, with Fortran as the primary coding medium and the hardware biased toward numerically intensive applications

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Computers, IEEE Transactions on  (Volume:37 ,  Issue: 12 )