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A language formalism for verification of PowerPCTM custom memories using compositions of abstract specifications

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4 Author(s)

We present a methodology in which the behavior of custom memories can be abstracted by a couple of artifacts-one for the interface and another for the contents. Memories consisting of several ports result into several user-provided abstract specifications, which in turn can be converted to simulation models. We show that (i) a simulation model is an approximation of the corresponding abstract specification and (ii) the abstracted memory core can be composed with the un-abstracted surrounding logic using a simple theory of composition. We make use of this methodology to verify equivalence between register transfer level and transistor level descriptions of custom memories

Published in:

High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth IEEE International

Date of Conference:

2001

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