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Symbolic simulation techniques-state-of-the-art and applications

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4 Author(s)
C. Blank ; Dept. of Electr. Eng. & Inf. Technol., Darmstadt Univ. of Technol., Germany ; H. Eveking ; J. Levihn ; G. Ritter

A number of different techniques of symbolic simulation in particular at the behavioral and structural rt-level are classified. The principles of the TUD Symbolic Simulator used for equivalence checking are briefly outlined. The application of the tool to property checking is demonstrated. Experimental results with input languages Esterel and C are given

Published in:

High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth IEEE International

Date of Conference:

2001