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A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers

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10 Author(s)
Weldon, J.A. ; Berkeley Wireless Res. Center, California Univ., Berkeley, CA, USA ; Narayanaswami, R.S. ; Rudell, J.C. ; Li Lin
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A highly integrated 1.75-GHz 0.35-μm CMOS transmitter is described. The I/Q modulator-based transmitter facilitates integration through the use of a unique mixer, termed a harmonic-rejection mixer, and a wide loop bandwidth phase-locked loop (PLL) for the RF synthesizer. The harmonic-rejection mixers are used to eliminate the need for a discrete IF filter and the use of a wide loop bandwidth PLL allowed for the complete integration of the synthesizers using low-Q components while achieving low phase noise. The entire transmit signal path from the digital-to-analog converters to the power amplifier, including two fully integrated frequency synthesizers, is integrated into a single-chip solution. The transmitter was tested with a testing buffer before the power amplifier (PA) and achieved less than 1.3° rms phase error when modulating a DCS-1800 GMSK signal. The prototype consumed 151 mA from a 3-V supply. A class-C PA, capable of driving 25 dBm off-chip, was included and the output was compared to the testing buffer with little change in the transmitter performance

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:36 ,  Issue: 12 )

Date of Publication:

Dec 2001

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