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Power-driven challenges in nanometer design

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2 Author(s)
D. Sylvester ; Michigan Univ., MI, USA ; H. Kaul

Addressing fundamental challenges to designing high-performance ICs in nanometer-scale technologies, the authors advocate a flexible approach to limiting both dynamic and static power. They recommend global-signaling strategies to curb communication power requirements and thermal management techniques to ease the burden on packaging

Published in:

IEEE Design & Test of Computers  (Volume:18 ,  Issue: 6 )