Results are presented of an electron spin resonance study of [100]Si/SiO/sub x//ZrO/sub 2/ and [100]Si/Al/sub 2/O/sub 3//ZrO/sub 2/ stacks with nm-thin SiO/sub x/, ZrO/sub 2/, and Al/sub 2/O/sub 3/ layers grown in a chemical vapor deposition reactor at 300/spl deg/C. After hydrogen photodesorption, prominent P/sub b0/, P/sub b1/ signals (Si dangling bond type centers) are observed at the [100]Si/dielectric interfaces. While reassuring for the Si/SiO/sub x//ZrO/sub 2/ case, this P/sub b0/, P/sub b1/ fingerprint, generally unique for the thermal [100]Si/SiO/sub 2/ interface, indicates that the as-deposited [100]Si/Al/sub 2/O/sub 3/ interface is basically Si/SiO/sub 2/-like. As probed by the properties of the P/sub b/-type centers, the interfaces of both types of structures are found to be under enhanced stress, typical for low temperature Si/SiO/sub 2/ growth. Standard quality thermal Si/SiO/sub 2/ interface properties may be approached by appropriate annealing. The results are discussed in the light of the aimed application of high-/spl kappa/ metal oxides in Si-based devices.
Published in:
Gate Insulator, 2001. IWGI 2001. Extended Abstracts of International Workshop on
Date of Conference: 1-2 Nov. 2001