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Physical modelling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage

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10 Author(s)
Anghel, C. ; Ecole Polytech. Fed. de Lausanne, Switzerland ; Hefyene, N. ; Ionescu, A.M. ; Vermandel, M.
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This paper deals with the investigation of the LDMOSFET saturation mechanisms via 2D numerical simulations and experiments. A clear separation between the saturation of intrinsic MOS transistor and complex quasi-saturation mechanisms is made using the intrinsic drain concept. A modelling strategy for drain current based on the experimental extraction of the drift series resistance is presented. Very good model performances using a BSIM3v3 low voltage model combined with the proposed drift resistance extracted values are reported

Published in:

Semiconductor Conference, 2001. CAS 2001 Proceedings. International  (Volume:2 )

Date of Conference:

Oct 2001

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