Skip to Main Content
CMOS RF MMIC amplifiers are fabricated with linearization technique using multiple gated transistors. At 900 MHz, double and triple gated amplifiers show 2.5-4.5 dB larger figure of merit (linearity-DC power consumption), which means that only 1/2/spl sim/1/3 of DC power is needed to obtain the same OIP/sub 3/ value. Using Volterra series analysis and harmonic balance simulation, it is shown that the linearization technique with the 2nd harmonic termination can increase IIP/sub 3/ by amount of 16 dB max. without additional DC power consumption at optimal bias condition, which can reduce more than 90% of DC power consumption with the same linearity performance.