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An efficient architecture and circuit implementation for programmable rank filtering is presented. The circuit ranks a one-dimensional signal in an amount of time independent of the number of signal values and the rank number. The operation is based on one MIN and one MAX filter, and can be efficiently implemented using winner-take-all circuits of O(1) time complexity and O(n) hardware complexity. SPICE simulations and experimental results from a fabricated CMOS chip are included
Published in:
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
(Volume:48
,
Issue:
9
)
Date of Publication: Sep 2001
- Page(s):
- 876 - 881
- ISSN :
- 1057-7130
- INSPEC Accession Number:
- 7105146
- Digital Object Identifier :
- 10.1109/82.965004
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Sep 2001
- Sponsored by :
- IEEE Circuits and Systems Society
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