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Queueing network models in the design and analysis of semiconductor wafer fabs

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2 Author(s)
S. Kumar ; Graduate Sch. of Bus., Stanford Univ., CA, USA ; P. R. Kumar

We provide an introduction to the application of queueing network models to the design and analysis of semiconductor wafer fabs. We introduce the basic issues that confront the system manager and discuss a variety of queueing network based tools for addressing these issues. A representative collection of existing results in this area is also briefly surveyed

Published in:

IEEE Transactions on Robotics and Automation  (Volume:17 ,  Issue: 5 )