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Modeling the influence of streaming instructions on video encoding time using Petri nets

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2 Author(s)
E. Debes ; Microprocessor Res. Labs., Intel Corp., Santa Clara, CA, USA ; F. Chopard

For optimized MPEG video software encoders, data transfers in the memory hierarchy of current PC workstations is one of the main bottleneck. In order to hide the latency of memory loads, new instructions have been added to the latest generations of general purpose processors. We propose to model data prefetching in the memory hierarchy using Petri nets and to simulate the execution of MPEG encoding using a computer aided Petri net based simulation tool. The results show that the use of prefetching instructions for video encoding makes it possible to compensate for slower caches and for slower bus speed

Published in:

Multimedia Signal Processing, 2001 IEEE Fourth Workshop on

Date of Conference: