Experimental study and modeling of the white noise sources in submicron Pand N-MOSFETs

This paper presents the results of the experimental characterization of the channel thermal noise in MOSFETs belonging to a submicron gate process, with minimum gate length L=0.35 /spl mu/m. The data are compared with a noise model taking into account short-channel effects such as velocity saturation and hot carriers. The contribution of gate and substrate parasitic resistors is also evaluated and included in the model. The analysis is carried out for devices with various gate geometries, investigating the behavior of the noise-related parameters in the range of small gate-to-source overdrive voltages, which is of major concern for low-power circuits.