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High performance near-single grain poly-Si lateral gate-all-around (GAA) MOS transistors have been demonstrated. A high I/sub ON//I/sub OFF/ ratio of 10/sup 8/ and nearly ideal subthreshold slope of 67 mV/dec were achieved. These devices were fabricated using a novel technique for crystallization of a-Si. resulting in substantial improvements in transistor performance as well as uniformity without the use of self-implantation. or any external crystallization seeding agents. The technology is simple, scalable, and CMOS compatible and therefore attractive for 3-D device integration.