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Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures

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5 Author(s)
Masselos, K. ; Dept. of Electr. & Comput. Eng., Patras Univ., Greece ; Catthoor, F. ; Kakarudas, A. ; Goutis, C.E.
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A systematic approach for the assignment of array type data structures to the layers of fixed memory hierarchies present in instruction set processors is presented. Memory Hierarchy Layer Assignment (MHLA) is required to ensure the efficient exploitation of the data re-use present in multimedia type algorithms. Exploitation of data re-use through storage of the most frequently accessed and re-used data elements in the smaller levels of a processor's physical memory hierarchy leads to significant execution time and power consumption savings. The proposed methodology for Memory Hierarchy Layer Assignment takes into consideration architectural features of the target processors such as the fixed physical data memory hierarchy and the hardware control mechanisms of some of the levels (caches) of the memory hierarchy. Experimental results prove that exploitation of data re-use combined with the proposed approach for Memory Hierarchy Layer Assignment leads to significant power consumption and performance gains

Published in:

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on  (Volume:1 )

Date of Conference:

2001

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