Power consumption of multimedia applications executing on embedded cores is heavily dependent on data transfers between system memory and processing units. In this paper, a power optimizing methodology based on data-reuse decisions and the development of a custom memory hierarchy is extended in order to determine the optimal solution in a rapid and reliable way. Data-reuse transformations are applied on a typical motion estimation algorithm in order to reduce the data-related power consumption by moving background memory accesses to smaller foreground memories, which are less power costly. Fast exploration of the design space is achieved by extracting analytical expressions for the number of accesses to data and instruction memories
Published in:
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
(Volume:2
)
Date of Conference: 2001