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HDL software development and hardware prototyping of a system-on-chip for an active filter controller

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4 Author(s)
Labbe, A. ; L2MP s/c INIT Technopole Chateau Gombert, Marseille, France ; Poure, P. ; Aubepart, F. ; Braun, F.

This paper deals with design and prototyping of System-on-Chip (SoC) in power electronics. First, a general methodology, based on Hardware Description Languages (HDL) and Field Programmable Gate Array (FPGA) prototyping is developed. Then, authors present an application case: a SoC for fully digital control of an active power filter. After filter control principle development, the digital controller properties are studied. Choices of operation sequences, specific binary format and ADC size are detailed, justified and validated by mixed simulations. Moreover, design of controller architecture and experimental validation of a FPGA prototype are examined

Published in:

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on  (Volume:2 )

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