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New embedded memory architecture for enhanced yield, performance and power consumption

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2 Author(s)
Polianskikh, B. ; Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, Que., Canada ; Zilic, Z.

A new cross-shared redundancy (CSR) architecture of embedded memory for yield improvement is proposed. The model of CSR takes into account cluster errors, which are common for deep-submicron technologies. The redundancy scheme is optimized in consideration of low-power and fast operation. A yield model of cross-shared redundancy for the embedded memory is presented

Published in:

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on  (Volume:2 )

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