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Dynamic power of CMOS gates driving lossy transmission lines

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5 Author(s)
Cappuccino, G. ; Dept. of Electronics, Comput. Sci. & Syst., Calabria Univ., Italy ; Corsonello, P. ; Cocorullo, G. ; Perri, S.
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The dynamic power consumption of a complementary metal-oxide-semiconductor (CMOS) gate driving a resistance-inductance-capacitance (RLC) transmission line is investigated in this paper. The closed-form solution for the dynamic power has been carried out by a simple time domain model for input impedance of a lossy transmission line, specifically developed to be used in conjunction with MOS macromodels. The proposed solution agrees with circuit simulations within 1% error for a wide range of line parameters, and it demonstrates how power dissipation localized in the wire resistance may be a significant aliquot of the global power consumption

Published in:

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on  (Volume:3 )

Date of Conference:

2001