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A systems approach to semiconductor optimization

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3 Author(s)
Newnes, L.B. ; Dept. of Mech. Eng., Bath Univ., UK ; Mileham, T.R. ; Doniavi, A.

Manufacturing systems optimization is a vast and complex problem. To ensure high yield within a manufacturing system many attributes and goals need to be considered. The authors aim to examine all of these and obtain the most suitable set-up for the manufacturing process. It is the author's view that to truly optimize a manufacturing system, the system needs to be examined as a whole, enabling the whole system to be optimized, not individual sub-systems. This paper describes a three-phase framework for use in optimising electronic manufacturing systems using a systems approach. Phase 1 is the system-modeling phase where a model of the system to be optimized is created. Phase 2 involves system analysis and control. In this phase the focus is on identifying areas of the manufacturing process where analysis and control needs to be undertaken. A collection of techniques can be used systematically to generate such information and provide an understanding of an individual process's capability. These techniques include process capability indices, measurement operation evaluation indices and process failure mode and effect critical analysis. The final phase is used to optimize the system using techniques such as experimental design and response surface models. This paper describes the proposed framework, which has been validated within semiconductor, assembly and printed circuit board manufacturing plants. Within the semiconductor facility one of the stages of the framework investigated was the process capability ratio (PCR), stage IV of the framework. PCR techniques were used to explain the relationship between the technical specification and the production capabilities. Various PCR indices were used such as Cp, Cpk and Cpm and these were generated for various gate turn off thyristor operations. The use of the Cpk indices is illustrated as a means of determining whether the process for gallium diffusion and gallium resistivity are capable

Published in:

Electronics Packaging Manufacturing, IEEE Transactions on  (Volume:24 ,  Issue: 3 )