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FSimGEO: a test generation method for path delay fault test using fault simulation and genetic optimization

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2 Author(s)
Sun Yihe ; Inst. of Microelectron., Tsinghua Univ., Beijing, China ; Wu Qifa

Presents FSimGEO, an efficient test generation method for path delay fault test using fault simulation and genetic optimization. A parallel-vector fault simulator is introduced first, which can simulate several test vector pairs at the same time through introducing a four-valued logic and the path status graph (PSG) of the circuit structure. After this, a special genetic optimization algorithm is used to direct the process of searching and to optimize test sets generated. We have given the fitness function and genetic operators that affect the optimizing efficiency of genetic algorithm (GA) in detail. Experimental results have shown that the number of paths tested by FSimGEO is about 3.5 times that by other methods

Published in:

ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International

Date of Conference:

2001