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A nonseparable VLSI architecture for two-dimensional discrete periodized wavelet transform

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3 Author(s)
King-Chu Hung ; Dept. of Electr. Eng., I-Shou Univ., Kaohsiung, Taiwan ; Yao-Shan Hung ; Yu-Jung Huang

A modified two-dimensional (2-D) discrete periodized wavelet transform (DPWT) based on the homeomorphic high-pass filter and the 2-D operator correlation algorithm is developed in this paper. The advantages of this modified 2-D DPWT are that it can reduce the multiplication counts and the complexity of boundary data processing in comparison to other conventional 2-D DPWT for perfect reconstruction. In addition, a parallel-pipeline architecture of the nonseparable computation algorithm is also proposed to implement this modified 2-D DPWT. This architecture has properties of noninterleaving input data, short bus width request, and short latency. The analysis of the finite precision performance shows that nearly half of the bit length can be saved by using this nonseparable computation algorithm. The operation of the boundary data processing is also described in detail. In the three-stage decomposition of an N/spl times/N image, the latency is found to be N/sup 2/+2N+18.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:9 ,  Issue: 5 )

Date of Publication:

Oct. 2001

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