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CMOS oversampling ΔΣ magnetic-to-digital converters

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4 Author(s)
Chien-Hung Kuo ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Shr-Lung Chen ; Lee-An Ho ; Shen-Iuan Liu

In this paper, two CMOS oversampling delta-sigma (ΔΣ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) ΔΣ modulator. The second one directly uses the MOP to realize a first-order SC ΔΣ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:36 ,  Issue: 10 )

Date of Publication:

Oct 2001

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