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A new logic transformation method for both low power and high testability

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2 Author(s)
Yoon-Sik Son ; Dept. of Electron. Eng., Hanyang Univ., Seoul, South Korea ; Jong-Wha Chong

In this paper, a new logic transformation method to achieve both low power consumption and high testability is proposed. Our method is based on the redundancy insertion approach. We also describe the structure of redundant connections that operate as test points in the test mode. The results of experiments on MCNC benchmark circuits show that the transformed circuit consumes less power in the normal mode and has higher testability in the test mode than the original circuit

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Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on  (Volume:1 )

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