An efficient resource allocation algorithm with minimal power consumption

This paper proposes an efficient resource allocation algorithm for the minimum power consumption of a functional unit in high level synthesis such as a DSP circuit for many functional units. We propose a method through high level simulation to find the switching activity in the circuit of each functional unit exchange for binary sequence length and value bit of logic one value. To use the switching activity we find the allocation with minimal power consumption; the proposed algorithm executes all control steps one by one and it determines the allocation with minimal power consumption at each control step.