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An active clamp circuit for voltage regulation module (VRM) applications

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2 Author(s)
A. M. Wu ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; S. R. Sanders

This paper discusses the design, fabrication, and testing of a CMOS active clamp circuit, The active clamp is a linear voltage regulator, with a voltage deadband to allow for voltage ripple, that is designed to operate in parallel with a switchmode voltage regulator. Its specific function is to sink or source large transient currents to microprocessor loads, thus allowing operation with very small output capacitance. Laboratory tests on a prototype IC exhibit stable behavior with negligible overshoot with only 47 microfarads of output capacitance with loads of about nine amperes. Output impedances of 2-3 mΩ are achieved

Published in:

IEEE Transactions on Power Electronics  (Volume:16 ,  Issue: 5 )